Merge pull request #578 from norhh/bugfix/548

Pad extra 0s for compressed solc hashes

mythril/disassembler/disassembly.py

@@ -20,10 +20,16 @@ class Disassembly(object):
 
         # Parse jump table & resolve function names
 
-        jmptable_indices = asm.find_opcode_sequence(["PUSH4", "EQ"], self.instruction_list)
+        # Need to take from PUSH1 to PUSH4 because solc seems to remove excess 0s at the beginning for optimizing
+        jmptable_indices = asm.find_opcode_sequence([("PUSH1", "PUSH2", "PUSH3", "PUSH4"), ("EQ",)],
+                                                    self.instruction_list)
 
         for i in jmptable_indices:
             func_hash = self.instruction_list[i]['argument']
+
+            # Append with missing 0s at the beginning
+            func_hash = "0x" + func_hash[2:].rjust(8, "0")
+
             self.func_hashes.append(func_hash)
             try:
                 # tries local cache, file and optional online lookup

mythril/ether/asm.py

@@ -70,13 +70,13 @@ def find_opcode_sequence(pattern, instruction_list):
 
     for i in range(0, len(instruction_list) - pattern_length + 1):
 
-        if instruction_list[i]['opcode'] == pattern[0]:
+        if instruction_list[i]['opcode'] in pattern[0]:
 
             matched = True
 
             for j in range(1, len(pattern)):
 
-                if not (instruction_list[i + j]['opcode'] == pattern[j]):
+                if not (instruction_list[i + j]['opcode'] in pattern[j]):
                     matched = False
                     break